1. Field of the Invention
The present invention generally relates to methods and systems for optical and non-optical measurements of a substrate. Certain embodiments relate to methods and systems for performing measurements with a non-optical subsystem and an optical subsystem and for calibrating one of the subsystems using measurements performed by the other subsystem.
2. Description of the Related Art
The following descriptions and examples are not admitted to be prior art by virtue of their inclusion within this section.
Fabricating semiconductor devices such as logic and memory devices typically includes processing a substrate such as a semiconductor wafer using a number of semiconductor fabrication processes to form various features and multiple levels of the semiconductor devices. For example, lithography is a semiconductor fabrication process that involves transferring a pattern from a reticle to a resist arranged on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing, etch, deposition, and ion implantation. Multiple semiconductor devices may be fabricated in an arrangement on a semiconductor wafer and then separated into individual semiconductor devices.
Throughout the fabrication process, characteristics of features formed on a wafer are measured for process monitoring and control purposes. For example, three-dimensional metrology of the profile of features on a wafer is often performed at various times during the process. In particular, the three-dimensional profile of photoresist features are often measured after a lithography step to determine if the features have characteristics that are within the specifications set for them (within spec). If the characteristics of the features are within spec, then the lithography step may be performed on additional wafers. On the other hand, if the characteristics of the features are not within spec, then one or more parameters of the lithography step may be altered. Another wafer may then be exposed in the lithography process, and the measurements described above may be performed. These steps may be repeated until the characteristics of the features are within spec.
As the dimensions of advanced semiconductor devices continue to shrink, the presence of defective features in the semiconductor devices increasingly limits the successful fabrication, or yield, of the semiconductor devices. For example, features formed on a wafer during the lithography step that are too large or too small may cause an open circuit or a short circuit in, or complete failure of, one or more semiconductor devices formed in subsequent processing. Because fabrication of a semiconductor device includes many complex process steps, the adverse effects of defective features on total yield may increase exponentially if a defective feature formed on a wafer in one process step causes additional defective features in subsequent process steps.
Accordingly, metrology of semiconductor wafers is and will continue to be of significant importance in semiconductor development and manufacturing. Furthermore, the ability of metrology tools or systems to measure a range of feature types precisely and accurately will determine how well characteristics of the features can be measured and, therefore, how well semiconductor fabrication processes can be monitored and controlled and how high the yield of a semiconductor fabrication process can be. Consequently, significant efforts have been and will continue to be made to increase the precision and accuracy of metrology systems by improving parameters of the systems such as resolution. There have also been significant efforts in improving the processing of metrology data to increase the accuracy with which features can be measured.
One common way to increase the accuracy of a feature measurement is to use a non-optical metrology technique for measurement of the feature instead of an optical metrology technique. One example of a non-optical metrology system that is commonly used to measure characteristics of features on wafers and reticles is a scanning electron microscope (SEM). Although electron beam metrology systems generally have greater resolution than optical metrology systems, there are several disadvantages to using such electron beam systems to measure characteristics of features on a reticle or a wafer. For example, existing SEM's used for critical dimension measurements use the apparent width of a structure to determine its dimensions. However, the apparent width of a feature is affected by many factors other than the actual physical width of the feature. For example, the interaction volume of the electrons in a given material and the related “edge-effect” can cause the apparent width of the feature to be much wider than its true physical dimensions. Similarly, the size of the measurement spot, the point spread function (PSF) of the system, the extraction field being used, and the geometry of the collector all affect the measured feature dimensions. Furthermore, the parameters of the SEM (as with other optical and non-optical measurement systems) may change over time thereby causing the measured sample properties to drift resulting in poor precision.
Accordingly, it would be advantageous to develop methods and systems for measurements of a feature on a substrate such as a wafer and a reticle that are more accurate and more precise than the optical and non-optical metrology systems that are currently available.